How Nano-transistor Deterioration Occurs
How Nano-transistor Deterioration Occurs
  • Reporter Shin Chang-ho
  • 승인 2010.01.01 20:55
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From now on, machines could be able to work as much as they are expected to thanks to the contribution of Prof. Yoon-Ha Jeong (vice-president) of the Deptartment of Electronic and Electrical Engineering and US SEMATECH (Semiconductor Manufacturing Technology).

Korea-US Joint researchers published new ways of improving the Lanthanum-doped Transistor, recently spotlighted as a next generation nano-transistor technology for regulating threshold voltage (minimum voltage that transistor could turn on electricity) in order to lessen the power consumption.

Last Dec. 8, Prof. Jeong’s laboratory read a paper about the mechanism between Lanthanum-doped Transistor’s dipole and super-high frequency characteristic at IEDM (International Electron Devices Meeting), which has the highest authority in semiconductor devices, held at Baltimore, US.

Nano-transistors with very high-speed integrated circuits used in, for example, CPU’s of cell-phones or computers have ambiguous characteristics at the super-high frequency area, causing a difference between expected capability and the real one. This is because the higher the frequency rises, the lower the amplification rate falls.

The research team developed the anti-deterioration model identifying that the dielectric relaxation made by lanthanum causes the deterioration. They expect that this development will bring shorter manufacturing hours and a cost reduction.

This research was supported by WCU (World Class University), ITCE (IT Convergence Engineering) of Ministry of Education, Science and Technology, BK21, and NCNT (National Center for Nano-materials Technology) of Ministry of Knowledge Economy.